Category "vlsi"

Scoreboard in UVM

What do we do when we have to create a scoreboard for a certain design logic? For a memory I understand that we can compare the data written to DUT at a certain

System Verilog always_latch vs. always_ff

I am confused about the usage of statements always_ff and always_latch. The former would be used as: always_ff @ (posedge clk) begin a <= b; end while t